The present disclosure relates generally to techniques for displaying images and, more particularly, to techniques for controlling a common electrode voltage (VCOM) or VCOM plate.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
As display panel refresh rates increase, line times become shorter and shorter. This is especially true when the displays are relatively large displays. These shorter line times reduce a period of time for which the VCOM for the display can settle. If VCOM does not settle before a next write mode, the display may show artifacts due to improper voltage differences across the pixels and/or sub-pixels of the display (e.g., LCD or OLED) during the write mode.